As semiconductor devices become various and three-dimensional, device structures become complicated and miniaturized. Accordingly, it is required to deal with various new surface structures and film qualities in a semiconductor manufacturing process. For example, in an etching process using a processing gas, chemical oxide removal (COR) is known as a technique capable of reducing damages to a substrate.
This technique is applied to, e.g., the case of etching a SiO2 (silicon oxide) layer that is an insulating layer for isolating transistors. If a circuit pattern becomes complicated and three-dimensional, SiO2 layers having different film qualities and used as etching target layers may be arranged on the surface of the substrate and etched. The SiO2 layers have different film qualities due to different manufacturing methods. For example, the SiO2 layers having different film qualities include a SiO2 layer formed by CVD and a SiO2 layer formed by oxidizing a Si (silicon) layer under an oxidizing atmosphere.
When the COR process is performed on the SiO2 layers, the surface heights of the SiO2 layers become non-uniform as the etching is performed. This is because their etching rates by the processing gas are different. Therefore, in the case of manufacturing a transistor by forming a gate electrode on the SiO2 layers in a subsequent step, electrical characteristics may be adversely affected.
Japanese Patent Application Publication No. 2005-303247 discloses a method for etching an oxide film by using a gaseous mixture of NF3 (nitrogen trifluoride) gas and He (helium) gas and removing impurities generated on a top surface of the oxide film due to F (fluorine) contained in the gaseous mixture by etching using a hydrogen plasma. Since, however, the disclosure of Japanese Patent Application Publication No. 2005-303247 is different in configuration from the present disclosure, it is difficult to achieve the objects of the present disclosure.